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4.7-Gb/s LDPC Decoder on GPU

delete2018-03-01
delete17
PRE
AI
J
Jinyang Yuan
沙
沙金 (Jin Sha) *
DOI:10.1109/LCOMM.2017.2778727delete
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摘要

摘要

En 中文
Graphics processing units (GPUs) are well-suited for decoding low-density parity-check (LDPC) codes because of their massive parallelisms and high flexibility. Implementations of high-throughput GPU-based LDPC decoders are described in this letter. By applying a novel message updating scheme and reducing shared memory consumption, the flooding-based and layered-based decoders outperform the corresponding state-of-the-art designs, with 55% and 34% improvements of normalized throughputs. On a single GeForce GTX 1080 Ti GPU, the two decoders achieve 4.77- and 3.67-Gb/s throughputs by incorporating early termination criterion. Throughputs of the GPU-based decoders are comparable with an implementation on the largest density field-programmable gate array.
Keyword:
LDPC codes
high throughput
decoding
GPU
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期刊

IEEE Communications Letters 封面图
IEEE Communications Letters
IF:
4.4
论文数:
1.3W
被引数:
2.2W

机构

N
nanjing university
学者数:
7.8W
论文数: 5.6W
被引数: 87
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