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A complete system for NN classification based on a VLSI array processor
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DOI：10.1016/S0031-3203(99)00192-2.png)
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摘要
En 中文
This paper describes a VLSI array processor system designed and built for classification problems based on the k-nearest-neighbors approach. This architecture is suitable for different pattern recognition applications and is very efficient for high-dimensional databases. The architecture is scalable with the size of the recognition problem making the system effectively applicable to computational intensive application like on-line pattern recognition. A system prototype composed of a board with two processors, the software driver and a test application have been built and evaluated. For handwritten character recognition task the complete system shows a speed up of 260 times over a sequential algorithm running on a Sun SPARC20 workstation. (C) 2000 Pattern Recognition Society. Published by Elsevier Science Ltd. All rights reserved.
Keyword:
pattern classification
k-nearest neighbors
array processor
configurable architecture
VLSI
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期刊
IF:
7.6
论文数:
1.4W
被引数:
4.9W
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