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A Digital Frequency-Locked Loop System for Capacitance Measurement

delete2013-04-01
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Robert N. Dean *
A
Aditi Rane
DOI:10.1109/TIM.2013.2240092delete
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摘要

摘要

En 中文
Similar to phase-locked loops, frequency-locked loops (FLLs) are useful in many applications involving waveform synchronization or synthesis. Simple logic circuit-based relaxation oscillators convert capacitance to frequency, which is a characteristic inverse relationship between output frequency and input capacitance. The oscillator's logic level square-wave output can be fed into an all-digital FLL that will frequency lock to the input signal and produce a digital output word N, where N is inversely proportional to the input frequency. The result is that N is linearly proportional to the unknown capacitance in the oscillator. This novel approach allows a simple FFL implementation for capacitance measurement and is demonstrated in hardware using a capacitive sensor that measures the mass of small quantities of water with an output capacitance range of 75-185 pF.
Keyword:
Capacitance measurement
frequency-locked loop (FLL)
sensor interface circuit
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期刊

IEEE Transactions on Instrumentation and Measurement 封面图
IEEE Transactions on Instrumentation and Measurement
IF:
5.9
论文数:
2.0W
被引数:
5.8W

机构

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Auburn University
学者数:
7.3K
论文数: 5.9K
被引数: 1.3W
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auburn university system
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1.1W
论文数: 9.5K
被引数: 9
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