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A Fully Integrated 1.7mW Attention-Based Automatic Speech Recognition Processor
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AI
DOI：10.1109/TCSII.2022.3191006.png)
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This brief presents a low-power attention-based automatic speech recognition (ASR) processor achieving real-time recognition capability. The proposed attention window algorithm, compact end-to-end neural-network topology, and efficient computation dataflow effectively minimize the hardware complexity and power consumption, enabling a fully integrated low-power ASR processor solution without the necessity of any off-chip memory resource. The proposed design techniques reduced 98.9% weight memory and 92.1% power consumption with minimal degradation of 2.24% in recognition accuracy. The proposed ASR processor operates at 100MHz with 1.7mW at 0.9V, demonstrating 2x and 1.68x performance improvements in speed and power, respectively, compared to the previous ASR designs that require additional supports of off-chip memory or external decoder.
Keyword:
Hardware
Hidden Markov models
Decoding
Memory management
Integrated circuit modeling
Computational modeling
Power demand
CMOS digital integrated circuits
automatic speech recognition
low-power
energy-efficient
neural network (NN)
attention mechanism
期刊
I
IF:
4.9
论文数:
8.8K
被引数:
2.5W
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An Ultra-Low Power Binarized Convolutional Neural Network-Based Speech Recognition Processor With On-Chip Self-Learning基于片上自学习的超低功耗二值化卷积神经网络语音识别处理器
PREAI
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