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A Functionality-Based Runtime Relocation System for Circuits on Heterogeneous FPGAs

delete2018-05-01
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OA
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G
Godwin Enemali *
A
Adewale Adetomi
G
G. Seetharaman
T
Tughrul Arslan
DOI:10.1109/TCSII.2018.2826014delete
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摘要

摘要

En 中文
Runtime relocation of circuits on fieldprogrammable gate arrays (FPGAs) has been proposed for achieving many desirable features including fault tolerance, defragmentation, and system load balancing. However, the changes in the architectural composition of FPGAs have made relocation more challenging mainly because FPGAs have become more heterogeneous. Previous and state-of-the-art circuit relocation systems on FPGAs have relied only on direct bitstream relocation which requires the source and destination resource layouts to be the same, as well as access to the design bitstream for manipulation. Hence, their efficiency on modern heterogeneous chips greatly reduces, and mostly cannot be applied to encrypted bitstreams of intellectual property blocks. In this brief, we present a circuit relocator which augments direct bitstream relocation with a functionality-based relocation scheme. We demonstrate the feasibility of the proposed technique using a CORDIC application and show that an average of over 2.6-fold increase in the number of relocations can be obtained compared to only direct bitstream relocation at the expense of a small memory overhead and manageable relocation time for this case study.
Keyword:
Bitstream relocation
FPGA
reconfigurable hardware
look-up-table
heterogeneous
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期刊

I
IEEE Transactions on Circuits and Systems and Express Briefs
IF:
4.9
论文数:
8.8K
被引数:
2.5W

机构

N
national institute of technology (nit system)
学者数:
4.0W
论文数: 3.7W
被引数: 31
U
University of Edinburgh
学者数:
5.2W
论文数: 4.6W
被引数: 71
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