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A Gate Driver With Integrated Deadtime Controller

delete2016-01-01
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PRE
AI
R
Romain Grézaud *
F
François Ayel
N
Nicolas Rouger
J
Jean-Christophe Crébier
DOI:10.1109/TPEL.2016.2517679delete
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Abstract

Abstract

En 中文
Deadtimes are required to avoid simultaneous conduction of high-side and low-side power transistors in half-bridge power converters. During these secure times, free-wheeling current flow generates extra power losses. Very short deadtimes are desired but they cannot be safely set in conventional isolated power converters because of a digital input propagation delay mismatch. A specific deadtime management is introduced in this paper to ensure proper operation of a high-voltage synchronous power converter. A controller integrated in each isolated gate driver secures synchronous switching by detecting the opposite switch turn-off before turn-on. With such a selfswitching technique, very short but safe nonoverlap times can be set. A gate driver has been implemented in a 0.35 mu m 20-V CMOS process. The monolithically integrated controller consumes only 140 mu A and 0.22 mm(2) of silicon area. The proposed local deadtime management has been validated in two synchronous buck converters without external free-wheeling diodes: a 500-W 250-V to 55-V converter based on SiC JFETs and a 30-W 45-V to 10-V converter based on eGaN FETs. In either case, the proposed controller allows a higher efficiency from 10% of the rated load with resulting deadtimes as short as 15 ns.
Keywords:
Analog integrated circuits
crosstalk
deadtime optimization
driver circuits
synchronous buck converter
wide-band gap semiconductors
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Journal

IEEE Transactions on Power Electronics cover
IEEE Transactions on Power Electronics
IF:
6.5
Papers:
1.7W
Citations:
8.3W

Organization

C
communaute universite grenoble alpes
Scholars:
3.5W
Papers: 2.7W
Citations: 29
C
CEA
Scholars:
3.5W
Papers: 2.3W
Citations: 62