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A hardware-friendly algorithm for LCU-level pipe-lined integer motion estimation
DOI:10.1007/s11042-023-15669-3.png)
摘要
En 中文
The latest video coding standards such as AVS3 adopts numerous novel coding tools and new partition mechanisms to achieve a better coding performance. But they also massively increase the computation overhead. Integer motion estimation (IME) is one of the most important and complex coding tools. The growing complexity of these video coding standards brings up severe challenges for both software and hardware implemented IME. Different from the software oriented IME algorithms, hardware-friendly IME algorithms often require low data dependency, regular data access and reasonable trade-off among compression performance, latency and resources. The challenges also highly relate to the hardware encoder architecture applying the IME algorithm. We propose a novel hardware-friendly integer motion estimation algorithm for AVS3 targeted for the Largest Coding Unit (LCU) level pipe-lined encoder architectures. The proposed algorithm consists of three parts, namely, a predictive motion vector prediction (PMVP) algorithm to derive predictive motion vectors (PMV) in advance to avoid the data dependency, a multi-resolution hierarchical motion estimation method that generates motion vectors (MVs) for 60% of the divided coding units (CUs) and a motion vector inference (MVI) method to infer MVs for the rest of the CUs. The proposed algorithms reduce the computation complexity by 88.64% for IME and only suffers 0.11% performance degradation for the IPPP configuration.
Keyword:
Video coding
Integer motion estimation
Hardware-friendly
Data dependency
Pipeline
AVS3
期刊
IF:
3
论文数:
2.0W
被引数:
3.2W
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