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A Low-Complexity Hardware for Deterministic Compressive Sensing Reconstruction
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DOI：10.1109/TCSI.2018.2803627.png)
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Reconstruction algorithms of compressively sampled data include solving a sparse approximation problem. This problem requires iterative search or optimization techniques. Software implementations are not fast enough for real-time applications of recovery algorithms and these algorithms should be implemented in hardware. This paper presents a low-complexity hardware for real-time reconstruction of compressively sensed signal using orthogonal matching pursuit algorithm. The main goal of this research is to provide a deterministic alternative to the random measurement matrix. The construction of this matrix is based on the connection between the parity check matrix of low-density parity-check (LDPC) codes and the measurement matrix of compressive sensing. For efficient hardware realization, a geometric approach to the construction of LDPC codes is used for matrix generation on the fly without requiring a lot of storage. Cyclic and binary structure of this matrix leads to the lower computational complexity and hardware cost in the reconstruction side. The described hardware has been implemented and evaluated on a virtex6 field-programmable gate array from Xilinx. Implementation results show that the proposed architecture has better performance in terms of hardware utilization. Moreover, the accuracy of the recovered signal is comparable with the previous works in which the random measurement matrix is used.
Keyword:
Compressive sensing
deterministic
low-density parity-check codes
measurement matrix
OMP
reconstruction
sparsity
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