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A New Approach to Parallel Processing
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DOI：10.1109/ACCESS.2020.2972204.png)
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The Application Space Architecture (ASA) defines parallel processor design as an adjunct to the Instruction Set Architectures (ISA) defined by Von Neumann for single processors. Before addressing hardware, one must understand applications requiring parallel processors, and software approaches required to meet speed constraints. Parallel processor applications use a single task to run N (number-of-processors) times faster than could be done on a single processor, where Processor Utilization Efficiency (PUE) is the ratio of single processor time to parallel processor time divided by N. Such applications require processing to be split into independent elements running in parallel on a large number of processors. This requires that processors do not sit idle (current PUEs are typically 2-10%.) This sets the requirement for independent elements to communicate with each other without stopping. In special cases, clusters of PCs are used to perform parametric analyses running many copies of a simulation on separate computers, typically using different random numbers. Except for initial and terminal processes, these separate simulations hardly communicate while running. Thus they are easily divided into separate tasks that typically exchange information between computers passing data or messages through a top level management task. Such applications (e.g., LINPACK) are labeled embarrassingly parallel.
Keyword:
Application space architecture
data structures
engineering drawings
instruction set architecture
module independence
parallel processing
processor utilization efficiency
separation principle
simulation
software architecture
software engineering
software design
state-space methods
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