.png){kind=icon}
返回
A Partial Page Cache Strategy for NVRAM-Based Storage Devices
.png){kind=icon}
PRE
AI
DOI：10.1109/TCAD.2018.2887045.png)
.png){kind=icon}
原文求助.png){kind=icon}
分享.png){kind=icon}
收藏
摘要
En 中文
Nonvolatile random access memory (NVRAM) is becoming a popular alternative as the memory and storage medium in battery-powered embedded systems because of its fast read/write performance, byte-addressability, and nonvolatility. A well-known example is phase-change memory (PCM) that has much longer life expectancy and faster access performance than NAND flash. When NVRAM is considered as both main memory and storage in battery-powered embedded systems, existing page cache mechanisms have too many unnecessary data movements between main memory and storage. To tackle this issue, we propose the concept of union page cache, to jointly manage data of the page cache in both main memory and storage. To realize this concept, we design a partial page cache strategy that considers both main memory and storage as its management space. This strategy can eliminate unnecessary data movements between main memory and storage without sacrificing the data integrity of file systems. A series of experiments was conducted on an embedded platform. The results show that the proposed strategy can improve the file accessing performance up to 85.62 & x0025; when PCM used as a case study.
Keyword:
Random access memory
Nonvolatile memory
Memory management
Performance evaluation
Embedded systems
Phase change materials
Battery-powered embedded systems
FAT
nonvolatile random access memory (NVRAM)
page cache
AI总结
对已上传原文的论文进行重点信息的提取，主要内容包括：简要概述、研究摘要、背景介绍、关键亮点、图文解析、展望与总结。
期刊
I
IF:
2.9
论文数:
671
被引数:
9.6K
机构
引用论文
分享收藏Highly Conductive 3D Segregated Graphene Architecture in Polypropylene Composite with Efficient EMI Shielding.png)
Polymers
OAAI
PolymersIF0
OAAI分享收藏
查看更多内容