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A pre-filter based PLL for three-phase grid connected applications

delete2011-01-01
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Rakesh Sinha
DOI:10.1016/j.epsr.2010.07.020delete
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摘要

摘要

En 中文
This paper proposes a phase estimator based on a pre-filter based phase locked loop (PF-PLL), which overcomes serious limitations of existing PLL routines under frequency variation, distorted power grid conditions and measurement errors. This is achieved by a chain of pre-filters, which systematically attenuates all distortion components and extracts the fundamental, positive-sequence signal. The reported PF-PLL is capable of fast and precise phase estimation, even with unbalanced and highly distorted threephase electrical variables, which may be measured with low-cost transducers of reduced accuracy. Consequently, it is appropriate for control of all grid connected equipment, including the dynamic voltage restorer (DVR), where it is often required to synchronize with line currents, which experience much higher levels of harmonic distortion than voltages. This paper presents a detailed analysis of the PF-PLL, its evaluation through simulation and experiments, using a fixed-point DSP based laboratory prototype. (C) 2010 Elsevier B.V. All rights reserved.
Keyword:
Phase locked loop (PLL)
Synchronous reference frame (SRF)
Grid connected applications
Phase estimation
Frequency measurement
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期刊

Electric Power Systems Research 封面图
Electric Power Systems Research
IF:
4.2
论文数:
1.2W
被引数:
2.2W

机构

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indian institute of technology (iit) - kanpur
学者数:
3.5K
论文数: 3.3K
被引数: 2
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indian institute of technology system (iit system)
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论文数: 9.9W
被引数: 93
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