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A scalable addressable positive-dielectrophoretic cell-sorting array
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DOI：10.1021/ac0513616.png)
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摘要
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We present the first known implementation of a passive, scalable architecture for trapping, imaging, and sorting individual microparticles, including cells, using a positive dielectrophoretic (p-DEP) trapping array. Our array-based technology enables active coverslips where, when scaled, many individually held cells can be sorted based upon imaged spatial or temporally variant characteristics. Our design incorporates a unique ring-dot p-DEP trap geometry organized in a row/column array format. This trap design, implemented in a two-level metal process, provides strong and highly spatially localized holding fields enabling single-cell capture for all traps in the array. We release individual trapped microparticles during sorting using a passive transistor-independent approach where we electrically ground the row and column electrodes associated with specific traps in the array. The demand for chip-to-world electrical connections in our arrays scales proportionally with the square root of the number of traps in a given array, delivering a substantial improvement over prior designs. We demonstrate capture, holding, and release operations with both beads and cells in small arrays of this new architecture.
Keyword:
SELF-ASSEMBLED MONOLAYERS
GENE-EXPRESSION
MANIPULATION
CHIP
MICROFABRICATION
FIELDS
TRAPS
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4.7W
被引数:
15.9W
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