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A single-chip HDTV video decoder design

delete1998-08-01
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PRE
AI
S
Sita, R *
B
Brosz, E
M
Meyer, R
P
Phillips, L
R
Ryan, RT
DOI:10.1109/30.713159delete
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摘要

摘要

En 中文
Development has been completed for a single-chip MPEG2 Main Profile @ High-Level Video Decoder that decodes and displays all 18 ATSC digital video formats, including HDTV. Additionally, it can downconvert HDTV inputs to SDTV resolution and incorporates programmable filters for display output reformatting. By using Rambus DRAM technology, adequate memory performance was achieved for a single-chip implementation. Applications include digital TV receivers, set-top boxes and computers.

期刊

IEEE Transactions on Consumer Electronics 封面图
IEEE Transactions on Consumer Electronics
IF:
10.9
论文数:
5.3K
被引数:
6.8K

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