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A time-optimal self-stabilizing synchronizer using a phase clock

delete2007-07-01
delete25
PRE
AI
B
Baruch Awerbuch *
S
Shay Kutten
Y
Yishay Mansour
B
Boaz Patt-Shamir
G
George Varghese
DOI:10.1109/TDSC.2007.1007delete
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摘要

摘要

En 中文
A synchronizer with a phase counter ( sometimes called asynchronous phase clock) is an asynchronous distributed algorithm, where each node maintains a local pulse counter that simulates the global clock in a synchronous network. In this paper, we present a time-optimal self-stabilizing scheme for such a synchronizer, assuming unbounded counters. We give a simple rule by which each node can compute its pulse number as a function of its neighbors' pulse numbers. We also show that some of the popular correction functions for phase clock synchronization are not self-stabilizing in asynchronous networks. Using our rule, the counters stabilize in time bounded by the diameter of the network, without invoking global operations. We argue that the use of unbounded counters can be justified by the availability of memory for counters that are large enough to be practically unbounded and by the existence of reset protocols that can be used to restart the counters in some rare cases where faults will make this necessary.
Keyword:
computer systems organization
computer-communication networks
network architecture and design subjects
distributed networks
mathematics of computing
discrete mathematics
graph theory
algorithms
reliability
theory
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期刊

IEEE Transactions on Dependable and Secure Computing 封面图
IEEE Transactions on Dependable and Secure Computing
IF:
7.5
论文数:
2.6K
被引数:
9.6K

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