.png){kind=icon}
返回
A Vector-Quantization Compression Circuit With On-Chip Learning Ability for High-Speed Image Sensor
.png){kind=icon}
OA
AI
DOI：10.1109/ACCESS.2017.2762399.png)
.png){kind=icon}
.png){kind=icon}
分享.png){kind=icon}
收藏
摘要
En 中文
As the fundamental technology of autonomous vehicles and high-speed tracking, high-speed vision always suffers from the bottlenecks of on-chip bandwidth and storage due to the resource constraints. To improve the resource efficiency, we propose a hardware-efficient image compression circuit based on the vector quantization for a high-speed image sensor. In this circuit, a self-organizing map is implemented for the on-chip learning of codebook to flexibly satisfy the requirements of different applications. To reduce the hardware resources, we present a reconfigurable complete-binary-adder-tree, where the arithmetic units are reused completely. In addition, a mechanism of partial vector-component storage is adapted to make the compression ratio adjustable. Finally, a parallel-elementary-stream design ensures a high processing speed. The proposed circuit has been implemented on the field-programmable gate araray and also applied in a high-speed object tracking system. The experimental results indicate that it achieves an encoding speed of 722 frames/s with 128 weight vectors when working at 79.8 MHz, and the worst tracking error caused by the proposed circuit is merely 9 pixels. These results evince that our proposed circuit can be completely integrated with a high-speed image sensor and used in high-speed vision systems.
Keyword:
High-speed image sensor
vector quantization
self-organizing map
field-programmable gate array (FPGA)
AI总结
对已上传原文的论文进行重点信息的提取，主要内容包括：简要概述、研究摘要、背景介绍、关键亮点、图文解析、展望与总结。
期刊
IF:
3.6
论文数:
9.8W
被引数:
29.4W
机构
引用论文
.png){kind=icon}
Quality Planning of Parts Machine Production Based on Housing of Cylinder Head Milling Machines
PREAI
分享收藏Notice of Retraction: Apply Data Mining to Students' Choosing Teachers Under Complete Credit Hour
PREAI
分享收藏A novel hardware-oriented Kohonen SOM image compression algorithm and its FPGA implementation一种面向硬件的Kohonen SOM图像压缩算法及其FPGA实现
PREAI
分享收藏分享收藏
查看更多内容