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A VLIW processor with hardware functions: Increasing performance while reducing power

delete2006-11-01
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PRE
AI
A
Alex K. Jones *
R
Raymond R. Hoare
D
Dara Kusic
J
Justin Stander
G
Gayatri Mehta
J
Josh Fazekas
DOI:10.1109/TCSII.2006.882849delete
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摘要

摘要

En 中文
This brief presents a heterogeneous multicore embedded processor architecture designed to exceed performance of traditional embedded processors while reducing the power consumed compared to low-power embedded processors. At the heart of this architecture is a multicore very large instruction word (VLIW) containing homogeneous execution cores/functional units. Additionally, heterogeneous combinational hardware function cores are tightly integrated to the VLIW core providing an opportunity for improved performance and reduced energy consumption. Our processor has been synthesized for both a 90-nm Strafix II field-programmable gate array and a 160-nm cell-based application-specific integrated circuit from Oki each operating at a core frequency of 167 MHz. For selected multimedia and signal processing benchmarks, we show how this processor provides kernel performance improvements averaging 179X over an Intel StrongARM and 36X over an Intel XScale leading to application speedups averaging 30X over StrongARM and 10X over XScale.
Keyword:
combinational
hardware functions
very large instruction word (VLIW)
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期刊

I
IEEE Transactions on Circuits and Systems and Express Briefs
IF:
4.9
论文数:
8.8K
被引数:
2.5W

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