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Accelerated image processing on FPGAs

delete2003-12-01
delete79
PRE
AI
B
Bruce A. Draper
B
Beveridge, JR
B
Böhm, APW
C
Charles A. Ross
M
M. Chawathe
DOI:10.1109/TIP.2003.819226delete
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摘要

摘要

En 中文
The Cameron project has developed a language called Single Assignment C (SA-C), and a compiler for mapping image-based applications written in SA-C to field programmable gate arrays (FPGAs). This paper tests this technology by implementing several applications in SA-C and compiling them to an Annapolis Microsystems (AMS) WildStar board with a Xilinx XV2000E FPGA. The performance of these applications on the FPGA is compared to the performance of the same applications written in assembly code or C for an 800 MHz Pentium III. (Although no comparison across processors is perfect, these chips were the first of their respective classes fabricated at 0.18 microns, and are therefore of comparable ages.) We find that applications written in SA-C and compiled to FPGAs are between 8 and 800 times faster than the equivalent program run on the Pentium III.
Keyword:
ARCHITECTURE
PARALLELISM
SOFTWARE
VISION
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期刊

IEEE Transactions on Image Processing 封面图
IEEE Transactions on Image Processing
IF:
13.7
论文数:
1.0W
被引数:
8.4W

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