Accelerating Deep Convolutional Neural Networks Using Number Theoretic Transform

Hong, Seongmin

doi:10.1109/TCSI.2022.3214528

2023-01-01

PRE

Hong, Seongmin

Arthanto, Yashael Faith

Joo-Young Kim *

DOI：10.1109/TCSI.2022.3214528

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摘要

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Modern deep convolutional neural networks (CNNs) suffer from high computational complexity due to excessive convolution operations. Recently, fast convolution algorithms such as fast Fourier transform (FFT) and Winograd transform have gained attention to address this problem. They reduce the number of multiplications required in the convolution operation by replacing it with element-wise multiplication in the transform domain. However, fast convolution-based CNN accelerators have three major concerns: expensive domain transform, large memory overhead, and limited flexibility in kernel size. In this paper, we present a novel CNN accelerator based on number theoretic transform (NTT), which overcomes the existing limitations. We propose the low-cost NTT and inverse-NTT converter that only use adders and shifters for on-chip domain transform, which solves the inflated bandwidth problem and enables more parallel computations in the accelerator. We also propose the accelerator architecture that includes multiple tile engines with the optimized data flow and mapping. Finally, we implement the proposed NTT-based CNN accelerator on the Xilinx Alveo U50 FPGA and evaluate it for popular deep CNN models. As a result, the proposed accelerator achieves 2859.5, 990.3, and 805.6 GOPS throughput for VGG-16, GoogLeNet, and Darknet-19, respectively. It outperforms the existing fast convolution-based CNN accelerators up to $9.6\times $ .

Keyword:

Convolutional neural networks (CNNs)

fast convolution

field programmable gate array (FPGA)

hardware accelerator

number theoretic transform (NTT)