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Adaptive Multibit Crosstalk-Aware Error Control Coding Scheme for On-Chip Communication
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DOI：10.1109/TCSII.2015.2483379.png)
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摘要
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The presence of different noise sources and continuous increase in crosstalk in the deep submicrometer technology raised concerns for on-chip communication reliability, leading to the incorporation of crosstalk avoidance techniques in error control coding schemes. This brief proposes joint crosstalk avoidance with adaptive error control scheme to reduce the power consumption by providing appropriate communication resiliency based on runtime noise level. By switching between shielding and duplication as the crosstalk avoidance technique and between hybrid automatic repeat request and forward error correction as the error control policies, three modes of error resiliencies are provided. The results show that, in reduced mode, the scheme achieves up to 25.3% power savings at 3-mm wire length as compared to the original nonadaptive scheme at the cost of only 3.4% power overhead in high protection mode.
Keyword:
Error control
fault tolerance
Hamming code
on-chip interconnect
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