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An algorithm for trading off quantization error with hardware resources for MATLAB-based FPGA design
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DOI：10.1109/TC.2005.106.png)
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Most practical FPGA designs of digital signal processing (DSP) applications are limited to fixed-point arithmetic owing to the cost and complexity of floating-point hardware. While mapping DSP applications onto FPGAs, a DSP algorithm designer must determine the dynamic range and desired precision of input, intermediate, and output signals in a design implementation. The first step in a MATLAB-based hardware design flow is the conversion of the floating-point MATLAB code into a fixed-point version using quantizers from the Filter Design and Analysis (FDA) Toolbox for MATLAB. This paper describes an approach to automate the conversion of floating-point MATLAB programs into fixed-point MATLAB programs, for mapping to FPGAs by profiling the expected inputs to estimate errors. Our algorithm attempts to minimize the hardware resources while constraining the quantization error within a specified limit. Experimental results on five MATLAB benchmarks are reported for Xilinx Virtex II FPGAs.
Keyword:
automation
field programmable gate arrays
fixed-point arithmetic
floating-point arithmetic
quantization
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3.8
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5.3K
被引数:
9.8K
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