An Efficient Barrel Distortion Correction Processor for Bayer pattern Images

Tae‐Hwan Kim

doi:10.1109/ACCESS.2018.2841013

2018-01-01

Tae‐Hwan Kim *

DOI：10.1109/ACCESS.2018.2841013

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摘要

En 中文

This paper proposes a low-complexity and high-throughput VLSI architecture for correction of barrel distortion in images acquired by wide-angle cameras. Given with a raw image that is obtained by the low-cost single-sensor cameras that employ the Bayer color fIlter array (CFA), the proposed architecture can perform the barrel distortion correction (BDC) jointly with color demosaicking, so as to produce the barrel-distortion-corrected color image. The backward mapping process, which maps each pixel location in the distorted image space into that in the corrected image space, is performed incrementally in order to reduce the number of complicated arithmetic units. The sub-pixel image resampling process is executed for each color channel considering the CFA. As a result, the proposed architecture performs BDC jointly with color demosaicking despite low hardware complexity. A prototype of the BDC processor based on the proposed architecture is implemented with 42.1K logic gates with 0.18 mu m CMOS technology; the correction throughput is 200 Mpixels/s. When compared to the previous single-channel BDC processors, the proposed architecture has the versatile functionality to perform BDC jointly with color demosaicking, even with a low-complexity. The correction efficiency is 2.22 times superior to that of the previous state-of-the-art BDC processor, where the correction efficiency is defined carefully to consider the correction throughput as well as the complexity. The correction quality is comparable to the previous one in terms of the peak-signal-to-noise ratio.

Keyword:

Barrel distortion correction

wide-angle camera

pipelined architecture

color demosaicking

very large scale integration (VLSI)