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An Efficient Implementation of KYBER
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DOI：10.1109/TCSII.2021.3103184.png)
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摘要
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Quantum algorithms pose a huge threat to the current cryptosystems. In this article, we present a hardware implementation of CRYSTALS-KYBER which is one of the post-quantum cryptosystems based on the Module-LWE problem. Using the proposed modular reduction algorithm, modified modular adder and the reconfigurable data path, the design shares the computing resource for different polynomial related operations, and achieves higher degree of parallelism. Our design is implemented on a Xilinx Artix-7 FPGA. Compared with the leading hardware implementations, our design is more compact, the execution time is shorter, and it significantly consumes fewer registers.
Keyword:
Hardware
Adders
Computer architecture
Random access memory
Pulse width modulation
Mathematical model
Clocks
Post-quantum cryptography
NTT
modular reduction
hardware implementation
CRYSTALS-KYBER
期刊
I
IF:
4.9
论文数:
8.8K
被引数:
2.5W
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