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An interconnect-free micro-electromechanical 7-bit arithmetic device for multi-operand programmable computing
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DOI：10.1038/s41378-023-00508-0.png)
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Computational power density and interconnection between transistors have grown to be the dominant challenges for the continued scaling of complementary metal-oxide-semiconductor (CMOS) technology due to limited integration density and computing power. Herein, we designed a novel, hardware-efficient, interconnect-free microelectromechanical 7:3 compressor using three microbeam resonators. Each resonator is configured with seven equal-weighted inputs and multiple driven frequencies, thus defining the transformation rules for transmitting resonance frequency to binary outputs, performing summation operations, and displaying outputs in compact binary format. The device achieves low power consumption and excellent switching reliability even after 3 x 10(3) repeated cycles. These performance improvements, including enhanced computational power capacity and hardware efficiency, are paramount for moderately downscaling devices. Finally, our proposed paradigm shift for circuit design provides an attractive alternative to traditional electronic digital computing and paves the way for multioperand programmable computing based on electromechanical systems.
Keyword:
4-2 COMPRESSOR
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TECHNOLOGY
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DESIGN
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