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Area-Efficient Multipliers Based on Multiple-Radix Representations
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DOI：10.1109/TC.2010.200.png)
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En 中文
In this paper, we shall introduce several new algorithms for integer multiplication that are based on specific multiple-radix representation of one of the multiplicands. We provide extensive theoretical analysis and experimental results for multipliers based on the new representations on 0.18 mu m CMOS technology. They provide a clear picture about the advantages of the new method in 64-bit hardware implementations compared to array-based classical multiplier and radix-8-based multiplier. The proposed multipliers have better area and power consumption compared to reference multipliers.
Keyword:
Integer multiplication
multiple-radix representation
double-base number system
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