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Bit vector architecture for computational mathematical morphology
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DOI：10.1109/TIP.2002.807362.png)
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摘要
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A real-time, compact architecture is presented for translation-invariant windowed nonlinear discrete operators represented in computational mathematical morphology. The architecture enables output values to be computed in a fixed number of operations and thus can be pipelined. Memory requirements for an operator are proportional to its basis size. An operator is implemented by three steps: 1) each component of vector observation is used as an index into a table of bit vectors; 2) all retrieved bit vectors are ANDed together; and 3) the position of the first nonzero bit is used as an index to a table of output values. Computational mathematical morphology is described, the new architecture is illustrated through examples, and formal proofs are given. A modification of the basic architecture provides for increasing operators.
Keyword:
electronic printing
image processing hardware
increasing operators
lattice operators
nonlinear filters
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期刊
IF:
13.7
论文数:
1.0W
被引数:
8.4W
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