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BrainForest: Neuromorphic Multiplier-Less Bit-Serial Weight-Memory-Optimized 1024-Tree Brain-State Classification Processor

delete2025-02-01
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PRE
AI
G
Gerard O’Leary *
J
Jamie Koerner
M
Mustafa Kanchwala
J
José Sales Filho
J
Jianxiong Xu
T
Taufik A. Valiante
R
Roman Genov
DOI:10.1109/TBCAS.2024.3481160delete
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摘要

摘要

En 中文
Personalized brain implants have the potential to revolutionize the treatment of neurological disorders and augment cognition. Medical implants that deliver therapeutic stimulation in response to detected seizures have already been deployed for the treatment of epilepsy. These devices require low-power integrated circuits for life-long operation. This constraint impedes the integration of machine-learning driven classifiers that could improve treatment outcomes. This paper introduces BrainForest, a neuromorphic multiplier-less bit-serial weight-memory-optimized brain-state classification processor. The architecture achieves state-of-the-art energy efficiency using two layers of neuron models to implement the spectral and temporal functions needed for classification: 1) resonate-and-fire neurons are used to extract physiological signal band energy EEG biomarkers 2) leaky integrator neurons are used to build multi-timescale representations for classification. Sparse neural model firing activity is used to clock-gate device logic, thereby decreasing power consumption by 93%. An energy-optimized 1024-tree boosted decision forest performs the classification used to trigger stimulation in response to detected pathological brain states. The IC is implemented in 65nm CMOS with state-of-the-art power consumption (best case: 9.6 mu W, typical: 118 mu W), achieving a seizure sensitivity of 97.5% with a false detection rate of 2.08 per hour.
Keyword:
Brain modeling
Support vector machines
Feature extraction
Epilepsy
Electroencephalography
Biological system modeling
Power demand
Circuits and systems
Biomarkers
Training
Neural Interface processor
exponentially decaying memory
signal energy
neuromodulation
AdaBoost
bit-serial processing
neuromorphic computing

期刊

IEEE Transactions on Circuits and Systems I-Regular Papers 封面图
IEEE Transactions on Circuits and Systems I-Regular Papers
IF:
5.2
论文数:
9.8K
被引数:
2.2W

机构

U
university of toronto
学者数:
14.8W
论文数: 12.0W
被引数: 165
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