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Caching With Light: A 16-bit Capacity Optical Cache Memory Prototype
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DOI：10.1109/JSTQE.2023.3247032.png)
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The need of faster access-times and increased memory bandwidths has triggered a concerted research effort towards deploying optical memory circuitry, targeting at the apex of the memory hierarchy pyramid that is traditionally reserved for the fastest access time memory configurations. The advances in integrated photonics allowed for remarkable progress in the field of optical memory implementations, but the majority of optical random-access memory (RAM) demonstrations still expands along single cell developments. A complete optical cache memory demonstration is currently completely missing, with the limited amount of multi-bit optical memory layouts reported so far failing to incorporate the rich organizational and functional framework offered by a cache memory. In this article, we demonstrate experimentally the first 16-bit photonic cache memory hardware prototype, organized in four addressable cache lines with a 4-bit wavelength-division multiplexing (WDM)-optical Data Word stored per line, capable of performing at a 20 Gb/s memory-throughput. The proposed optical cache layout combines a WDM-enabled optical RAM bank and a complete set of cache peripherals, implementing for the first time all cache functionalities directly in the optical domain.
Keyword:
Random access memory
Integrated optics
Optical device fabrication
Cache memory
Wavelength division multiplexing
Adaptive optics
Layout
Cache peripheral circuitry
optical cache memory
optical RAM
WDM RAM bank
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