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CIM-KF: Efficient Computing-in-memory Circuits for Full-Process Execution of Kalman Filter Algorithm
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DOI：10.1145/3673038.3673079.png)
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Abstract
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Kalman Filter (KF) algorithm, which can solve the state estimation problem of multi-variable and complex dynamical system, plays a pivotal role in a multitude of engineering scenarios. However, the traditional digital computing architecture represented by the vonNeumann architecture are currently confronted with high overhead challenges in terms of latency, energy, and area when executing KF algorithm. Aiming at the problem, we propose CIM-KF, the first Computing-in-memory (CIM) circuits for KF algorithm. CIMKF can efficiently carry out the entire process of KF algorithm by capitalizing on the large-scale parallel computation inherent in the CIM architecture. The evaluation shows that CIM-KF has average 96.15% accuracy for 32-th order parameter matrix in KF algorithm, and can be 13.89x similar to 55.21x faster than existing ASIC and FPGA implementations of KF algorithm. The results also demonstrate that CIM-KF can deliver up to 3.52x energy efficiency improvement and 54.79x area efficiency improvement, and reduce over 90% latency overhead, compared with the SOTA counterparts. Furthermore, we propose a novel design of ReRAM-CIM architecture, underpinned by the CIM-KF, aimed at precise and rapid calculation of the state of capacity and terminal voltage in Battery Management Systems. By evaluation, our proposed architecture boasts the estimation accuracy within 2% error for the individual battery cell of state of capacity and terminal voltage. With the strengths of the parallel computing intrinsic to CIM architecture and the speed of analog circuit, our architecture facilitates speed up to 70.6x in accurate estimation when bench-marked against the SOTA work.
Keywords:
Computing-in-memory
ReRAM
Circuit design
Kalman Filter algorithm
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