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Circuits to Systems: Codesigning Efficient AI Hardware

delete2025-12-01
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PRE
AI
Y
Yiran Chen *
C
Cong Guo
Y
Yintao He
M
Mingyuan Ma
T
Tergel Molom-Ochir
N
Nicky Ramos
H
Haoxuan Shan
W
Wei, Chiyue
李海 封面图
李海 (Hai Li)
DOI:10.1109/MDAT.2025.3600328delete
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摘要

摘要

En 中文
Editor's notes: The authors explore the intertwined progress of circuit innovation and system architecture that has propelled AI development-from early neuro-morphic circuits to today's memory-centric accelerators. They review milestones such as processing-in-memory, GPUs, and systolic arrays and address emerging challenges from large language models. -Jorg Henkel, Vice-President of Publications, IEEE CEDA -L. Miguel Silveira, President, IEEE CEDA
Keyword:
Artificial intelligence
Hardware
Computer architecture
Graphics processing units
Quantization (signal)
Training
Systolic arrays
Deep learning
Computational modeling
Architecture
Circuit synthesis
Circuits
Systems
Co-design
Neuromorphic Computing
AI Acceleration
Large Language Models

期刊

I
IEEE Design & Test
IF:
1.9
论文数:
39
被引数:
0

机构

D
duke university
学者数:
8.5K
论文数: 3.4K
被引数: 2
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