arrow
返回

CiTST-AdderNets: Computing in Toggle Spin Torques MRAM for Energy-Efficient AdderNets

delete2024-03-01
delete0
PRE
AI
L
Lichuan Luo
E
Erya Deng
D
Dijun Liu *
W
Wang, Zhen
W
Weiliang Huang
张
张贺 (He Zhang)
X
Xiao Liu
J
Jinyu Bai
J
Junzhan Liu
Y
Youguang Zhang
W
Wang Kang *
DOI:10.1109/TCSI.2023.3343081delete
delete原文链接
delete原文求助
delete分享
delete收藏
摘要

摘要

En 中文
Recently, Adder Neural Networks (AdderNets) have gained widespread attention as an alternative to traditional Convolutional Neural Networks (CNNs) for deep learning tasks. AdderNets use lightweight addition operations to replace multiplication and accumulation (MAC) operations, but can keep almost the same accuracy compared to other CNNs. Nevertheless, challenges still exist with regards to hardware resources, power consumption, and communication bandwidth, primarily due to the 'Von-Neumann bottlenecks'. However, computing-in-memory (CIM) architecture based on magnetic random-access memory (MRAM) has great potential for edge DNN implementation. In this paper, we propose a novel CIM paradigm using a novel Toggle-Spin-Torques (TST) driven MRAM for energy-efficient AdderNets (called CiTST_AdderNets). In CiTST_AdderNets, MRAM is driven by the interplay of the field-free spin orbit torque (SOT) effect and the spin transfer torque (STT) effect, which offers a fascinating prospect for energy efficiency and speed. Furthermore, a novel CIM paradigm is proposed to implement the dominating subtraction and sum operations in AdderNets, reducing data transfer and the related energy. Meanwhile, a highly parallel array structure integrating computation and storage is designed to support CiTST_AdderNets. In addition, a mapping strategy is proposed to efficiently map the convolution layer on the array. Fully connected layers can also be efficiently computed. The CiTST-AdderNets macro is designed by using a 65-nm CMOS process. Results show that our CiTST-AdderNets consumes about 1.65 mJ, 9.29 mJ, and 42.46 mJ for running VGG8, ResNet-50, and ResNet-18 respectively at 8-bit fixed-point precision. Compared to state-of-the-art platforms, our macro achieves an energy efficiency improvement of 1.45 x to 66.78 x.
Keyword:
Computing-in-memory
toggle-spin-torques
magnetic random-access memory
adder neural networks

期刊

IEEE Transactions on Circuits and Systems I-Regular Papers 封面图
IEEE Transactions on Circuits and Systems I-Regular Papers
IF:
5.2
论文数:
9.9K
被引数:
2.2W

机构

B
Beihang University
学者数:
5.2W
论文数: 4.1W
被引数: 37
引用论文

引用论文

A Reconfigurable Spatial Architecture for Energy-Efficient Inception Neural Networks
err2023-03-01
err6
PREAI
errLuo, Lichuan; Kang, Wang; Liu, Junzhan; Zhang, He; Zhang, Youguang; Liu, Dijun; Ouyang, Peng
err分享
err收藏
Field-free spin-orbit torque-induced switching of perpendicular magnetization in a ferrimagnetic layer with a vertical composition gradient具有垂直组成梯度的亚铁磁层中无场自旋轨道转矩引起的垂直磁化切换
err2021-07-27
err145
errOAAI
errZheng, Zhenyi; Zhang, Yue; Lopez-Dominguez, Victor; Sanchez-Tejerina, Luis; Shi, Jiacheng; Feng, Xueqiang; Chen, Lei; Wang, Zilu; Zhang, Zhizhong; Zhang, Kun; Hong, Bin; Xu, Yong; Zhang, Youguang; Carpentieri, Mario; Fert, Albert; Finocchio, Giovanni; Zhao, Weisheng; Amiri, Pedram Khalili
err分享
err收藏
Current-induced magnetization switching in atom-thick tungsten engineered perpendicular magnetic tunnel junctions with large tunnel magnetoresistance
err2018-02-14
err291
errOAAI
errWang, Mengxing; Cai, Wenlong; Cao, Kaihua; Zhou, Jiaqi; Wrona, Jerzy; Peng, Shouzhong; Yang, Huaiwen; Wei, Jiaqi; Kang, Wang; Zhang, Youguang; Langer, Juergen; Ocker, Berthold; Fert, Albert; Zhao, Weisheng
err分享
err收藏
err
IF0
err
err0
PREAI
err
err分享
err收藏
学者 查看更多内容