.png){kind=icon}
.png){kind=icon}
Return
Co-packaged optics for high-performance computing and artificial intelligence
.png){kind=icon}
PRE
AI
DOI：10.1038/s41928-026-01681-6.png)
.png){kind=icon}
Original request for help.png){kind=icon}
Share.png){kind=icon}
Save
Abstract
En 中文
The large data movement required in high-performance computing and artificial intelligence workloads has exposed the fundamental limits of electrical interconnects, where resistive losses, capacitive loading and frequency-dependent distortion increasingly constrain bandwidth, latency and energy efficiency. Optical compute interconnects, which replace electrical links with co-packaged photonic channels, could provide low propagation loss, high bandwidth and superior signal integrity. Here, we examine the development of optical chip-to-chip interconnects and co-packaged optics for high-performance computing and artificial intelligence. We analyse the key domains, including electrical subsystems, electro–optical and opto–electronic conversion interfaces, and optical transmission networks, that determine system-level performance across bandwidth, energy and latency metrics. We also provide a technology roadmap from two-dimensional (2D) co-packaged optics, 2.5D interposer-based integration and 3D heterogeneous stacking, identifying critical challenges in thermal management, manufacturability and standardization that will need to be addressed to establish optical compute interconnects as a foundational communication technology for high-performance computing infrastructure. This Review examines optical chip-to-chip interconnects and co-packaged optics for high-performance computing applications, considering key functional domains, the performance of different integration strategies and the critical challenges to widespread adoption.
Journal
IF:
40.9
Papers:
1.7K
Citations:
2.1W
View more organizations