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Combining trace sampling with single pass methods for efficient cache simulation
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DOI：10.1109/12.689650.png)
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The design of the memory hierarchy is crucial to the performance of high performance computer systems. The incorporation of multiple levels of caches into the memory hierarchy is known to increase the performance of high end machines, but the development of architectural prototypes of various memory hierarchy designs is costly and time consuming. In this paper, we will describe a single pass method used in combination with trace sampling techniques to produce a fast and accurate approach for simulating multiple sizes of caches simultaneously.
Keyword:
performance analysis
sampling techniques
single pass algorithms
stacking algorithms
trace-driven simulation
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3.8
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5.3K
被引数:
9.8K
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