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Concealing Exposed Circuit Features Through a MaxSAT-Based Logic Locking Method
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DOI：10.1109/TCSII.2023.3335861.png)
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摘要
En 中文
Logic locking has emerged as an effective means of hardware intellectual property protection. Nevertheless, the success of machine learning-based attacks has necessitated the development of new countermeasures. In this brief, we propose a novel approach to multiplexer-based locking that conceals structural and functional features common to all learning-based attacks. By employing a constraint programming approach, we formulate those features as weights for Conjunctive Normal Form (CNF) clauses. We then use Maximum Satisfiability (MaxSAT) solvers to choose locked net pairs in a manner that effectively decreases the correlation between the key bits and the features exploited by attackers. The experimental results demonstrate an 44.19% average reduction in the number of correctly predicted key bits by the learning-based MuxLink attack when compared to the DMUX lock. Furthermore, the prediction accuracy for the constant propagation-based SCOPE attack was consistently below 50%, while the number of undecided bits rose by an average 29.04% in comparison with the DMUX lock.
Keyword:
Limiting
Hardware security
IP protection
logic locking
MaxSAT applications
期刊
I
IF:
4.9
论文数:
8.8K
被引数:
2.5W
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