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D-NAT: Data-Driven Non-Ideality Aware Training Framework for Fabricated Computing-In-Memory Macros

delete2022-06-01
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PRE
AI
M
Ming-Guang Lin
C
Chi-Tse Huang
Y
Yu-Chuan Chuang
Y
Yi-Ta Chen
Y
Ying–Tuan Hsu
Y
Yukai Chen
J
Jyun‐Jhe Chou
T
Tsung-Te Liu
C
Chi‐Sheng Shih
A
An-Yeu Wu *
DOI:10.1109/JETCAS.2022.3171268delete
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摘要

摘要

En 中文
To enable energy-efficient computation for deep neural networks (DNNs) at edge, computing-in-memory (CIM) is proposed to reduce the energy costs during intense off-chip memory access. However, CIM is prone to multiply-accumulate (MAC) errors due to non-idealities of memory crossbars and peripheral circuits, which severely degrade the accuracy of DNNs. In this work, we propose a Data-Driven Non-ideality Aware Training (D-NAT) framework to compensate for the accuracy degradation. The proposed D-NAT framework has the following contributions: 1) We measured a fabricated SRAM-based CIM macro to obtain a data-driven MAC error model (D-MAC-EM). Based on the derived D-MAC-EM, we analyze the impact of the non-idealities on DNN's accuracy. 2) To make DNNs robust to the non-idealities of CIM macros, we incorporate the measured D-MAC-EM into DNN's training procedure. Moreover, we propose a statistical training mechanism to better estimate the gradients of the discrete D-MAC-EM. 3) We investigate trade-offs between quantization range and quantization errors. To mitigate the quantization errors in activations, we introduce extended PACT (E-PACT) that adaptively learns the upper and lower bounds of input activations for each layer. Simulation results show that our proposed D-NAT improves the accuracy of ResNet20, VGG8, ResNet34, and VGG16 by 78.98%, 71.8%, 72.04%, and 57.85%, respectively, which reaches the ideal upper bound of the quantized model. Lastly, the D-NAT framework is validated on an FPGA platform with the fabricated SRAM-based CIM macro chip. Based on the measurement results, D-NAT successfully recovers the accuracy under non-idealities of a real SRAM-based CIM macro.
Keyword:
Training
Quantization (signal)
Computational modeling
Common Information Model (computing)
Circuits and systems
Semiconductor device measurement
Hardware
Computing-in-memory (CIM)
deep neural network (DNN)
non-ideality aware training

期刊

IEEE Journal on Emerging and Selected Topics in Circuits and Systems 封面图
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
IF:
3.8
论文数:
1.4K
被引数:
2.8K

机构

N
National Taiwan University
学者数:
4.7W
论文数: 4.2W
被引数: 3.6W
引用论文

引用论文

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Resistive Memory-Based In-Memory Computing: From Device and Large-Scale Integration System Perspectives
err2019-09-20
err77
errOAAI
errYan, Bonan; Li, Bing; Qiao, Ximing; Xue, Cheng-Xin; Chang, Meng-Fan; Chen, Yiran; Li, Hai (Helen)
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