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Delta Counter: Bandwidth-Efficient Encryption Counter Representation for Secure GPU Memory
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DOI：10.1109/TDSC.2024.3389560.png)
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摘要
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The security of GPUs has recently gained significant attention. To support secure memory for GPUs, the critical performance bottleneck is the memory bandwidth contention between the regular data and the security metadata (Yuan et al. 2021). With counter-mode encryption, the security meta includes counters, the Bonsai Merkle Tree (BMT), and message authentication codes (MACs). In this work, we focus on encryption counters given their impact on the counter and BMT traffic while leveraging prior schemes (Saileshwar et al. 2018), (Taassori et al. 2018) to address the MAC traffic. We first analyze the characteristics of the encryption counters from a wide range of GPGPU benchmarks and make two key observations. (1) With the split counter scheme, the cache blocks in a large portion of the memory space, sometimes the entire GPU memory space, share the same major counter value. (2) The difference among minor counters is limited. We then propose a novel scheme to reduce the encryption counter traffic. Our design includes (a) a highly compact way of counter representation and (b) a verification scheme to determine the correct minor counter values. Compared to prior works on reducing counter traffic (Na et al. 2021), our scheme handles more counter value patterns (as we don't restrict the counters to be the same in a memory chunk) and is more effective in reducing counter traffic.
Keyword:
Encryption
Graphics processing units
Security
Metadata
Bandwidth
Protection
System-on-chip
GPU
GPU security
secure memory
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7.5
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2.5K
被引数:
9.6K
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