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Design of Nonbinary LDPC Codes Based on Message-Passing Algorithms
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DOI：10.1109/TCOMM.2018.2849076.png)
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Short cycles in a nonbinary low-density parity-check (NB-LDPC) code may he even more harmful to its performance if they do not satisfy the so-called full rank condition (FRC). This is because they may induce low-weight codewords or absorbing sets in that case. Thus, it is important to count the number of short cycles not satisfying the FRC as well as the number of short cycles for analyzing the performance of an NB-LDPC code. In this paper, we first develop a novel message-passing algorithm and identify how it is related to the FRC. We then propose a low-complexity algorithm for counting the number of short cycles not satisfying the FRC in an NB-LDPC code, as well as the number of short cycles. Finally, we propose a low-complexity algorithm for designing an NB-LDPC code with low error floor. Depending on the modulation scheme, the codes constructed by the proposed design algorithm have similar or slightly worse performance, compared with those constructed via the method by Poulliat et al. However, the proposed design algorithm does not require a cycle enumeration algorithm with high complexity, and therefore is feasible even in the case of large code length, say >= 5000.
Keyword:
Nonbinary low-density parity-check codes
full rank condition
message-passing algorithm
counting cycles
error floor
design method
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8.3
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1.2W
被引数:
3.6W
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