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Difference metric soft-output detection: Architecture and implementation
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DOI：10.1109/82.974777.png)
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The forward-backward (FB, also known as the MAP or BCJR) detection algorithm provides soft reliability estimates for each bit that it decodes. This paper presents a VLSI architecture for soft-output forward-backward detection of Class-IV partial response signaling (PR4) used in magnetic recording. A difference metric version of the FB algorithm is derived. A novel low-complexity architecture implements the computational kernel as a limiter. A 0.35-mum 3-level metal CMOS ASIC was implemented and verified to operate at 20 MHz (20 Mbps), the highest speed of our IC tester. Simulations predict operation of up to 150 Mbps.
Keyword:
CMOS digital integrated circuits
digital communication.
MAP estimation
partial response signaling
very large scale integration
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