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Dynamic ConvNets on Tiny Devices via Nested Sparsity

delete2023-03-15
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OA
AI
M
Matteo Grimaldi
L
Luca Mocerino
A
Antonio Cipolletta
A
Andrea Calimera *
DOI:10.1109/JIOT.2022.3222014delete
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摘要

摘要

En 中文
This work introduces a new training and compression pipeline to build nested sparse convolutional neural networks (ConvNets), a class of dynamic ConvNets suited for inference tasks deployed on resource-constrained devices at the edge of the Internet of Things. A nested sparse ConvNet consists of a single ConvNet architecture, containing $N$ sparse subnetworks with nested weights subsets, like a Matryoshka doll, and can trade accuracy for latency at runtime, using the model sparsity as a dynamic knob. To attain high accuracy at training time, we propose a gradient masking technique that optimally routes the learning signals across the nested weight subsets. To minimize the storage footprint and efficiently process the obtained models at inference time, we introduce a new sparse matrix compression format with dedicated compute kernels that fruitfully exploit the characteristic of the nested weights subsets. Tested on image classification and object detection tasks on an off-the-shelf ARM-M7 microcontroller unit (MCU), nested sparse ConvNets outperform variable-latency solutions naively built assembling single sparse models trained as stand-alone instances, achieving 1) comparable accuracy; 2) remarkable storage savings; and 3) high performance. Moreover, when compared to state-of-the-art dynamic strategies, such as dynamic pruning and layer width scaling, nested sparse ConvNets turn out to be Pareto optimal in the accuracy versus latency space.
Keyword:
Training
Internet of Things
Task analysis
Pipelines
Kernel
Computational modeling
Costs
latency-quality scaling
microcontroller units (MCUs)
neural network compression

期刊

IEEE Internet of Things Journal 封面图
IEEE Internet of Things Journal
IF:
8.9
论文数:
1.4W
被引数:
7.8W

机构

P
Polytechnic University of Turin
学者数:
1.3W
论文数: 1.3W
被引数: 1.3W
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