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Efficient optimization with higher-order ising machines

delete2023-09-27
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OA
AI
C
Connor Bybee
D
Denis Kleyko
D
Dmitri E. Nikonov
K
Khosrowshahi, Amir
B
Bruno A. Olshausen
S
Sommer, Friedrich T. *
DOI:10.1038/s41467-023-41214-9delete
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摘要

摘要

En 中文
A prominent approach to solving combinatorial optimization problems on parallel hardware is Ising machines, i.e., hardware implementations of networks of interacting binary spin variables. Most Ising machines leverage second-order interactions although important classes of optimization problems, such as satisfiability problems, map more seamlessly to Ising networks with higher-order interactions. Here, we demonstrate that higher-order Ising machines can solve satisfiability problems more resource-efficiently in terms of the number of spin variables and their connections when compared to traditional second-order Ising machines. Further, our results show on a benchmark dataset of Boolean k-satisfiability problems that higher-order Ising machines implemented with coupled oscillators rapidly find solutions that are better than second-order Ising machines, thus, improving the current state-of-the-art for Ising machines. Combinatorial optimization problems can be solved on parallel hardware called Ising machines. Most studies have focused on the use of second-order Ising machines. Compared to second-order Ising machines, the authors show that higher-order Ising machines realized with coupled-oscillator networks can be more resource-efficient and provide superior solutions for constraint satisfaction problems.
Keyword:
NEURAL-NETWORKS
FACTORIZATION
CIRCUITS
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Nature Communications
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15.7
论文数:
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被引数:
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Intel Corporation
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University of California System
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被引数: 6.6K
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