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FIACCEL: Memory Efficient Frame Interpolation Accelerator for Full-HD Video

delete2024-04-01
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PRE
AI
M
Min Wu Jeong
C
Chae Eun Rhee *
DOI:10.1109/TCSII.2023.3329966delete
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摘要

摘要

En 中文
Frame interpolation (FI) is a challenging task that involves generating intermediate frames between two consecutive frames of a video to achieve smooth motion. Although several approaches, including deep learning-based and hybrid methods, have been proposed, most target GPU systems with high computational costs, making it difficult for real-time on-device systems. This brief proposes a memory-efficient and low-complexity accelerator for FI by analyzing the most memory-inefficient part of the encoder-decoder structure and applying schemes such as feature map reuse, selective transfer to DRAM, row-wise layer fusion, kernel decomposition, and parallelized horizontally dilated convolutions. The proposed hardware is verified on an FPGA environment and can synthesize 1920x 1080 video from 90 fps to 180 fps in real-time with an average PSNR quality of 31.98 dB on the Vimeo90K dataset.
Keyword:
Kernel
Random access memory
Frequency modulation
Memory management
Hardware
Decoding
System-on-chip
Frame interpolation
convolutional encoder decoder neural network accelerator
auto encoder accelerator

期刊

I
IEEE Transactions on Circuits and Systems and Express Briefs
IF:
4.9
论文数:
8.8K
被引数:
2.5W

机构

I
Inha University
学者数:
1.1W
论文数: 1.1W
被引数: 1.1W
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