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Fully CMOS-Based p-Bits with a Bistable Resistor for Probabilistic Computing
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DOI：10.1002/adfm.202307935.png)
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Abstract
En 中文
Probabilistic computing can solve complex combinatorial optimization problems more efficiently than conventional deterministic computing. A probabilistic bit (p-bit) with an n-p-n bistable resistor (biristor) is demonstrated for probabilistic computing. It is fabricated on an 8-inch wafer with complementary metal-oxide-semiconductor (CMOS) compatible technologies. Its stochastic behavior of threshold switching, which is based on the phenomenon of a single transistor latch, provides output with a Boltzmann distribution. The p-bit is composed of a biristor, a serial resistor, and a comparator. The output probability of the biristor-based p-bits shows a sigmoidal relationship with the input voltage, showing typical p-bit characteristics. Invertible Boolean logic operations with p-bits are demonstrated, and weighted maximum Boolean satisfiability problems are solved with high energy efficiency and accuracy. The biristor-based p-bits with perfect CMOS compatibility show sufficient device stability, demonstrating the possibility of large-scale integration with a p-bit array for complex optimization solvers.
Keywords:
biristors
invertible logic
maximum-SAT
probabilistic bit (p-bit)
probabilistic computing
Journal
IF:
19
Papers:
3.4W
Citations:
32.1W