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Harnessing Gaussianlike transfer characteristics for ultraefficient computation in monolayer two-dimensional devices
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DOI：10.1103/PhysRevApplied.23.044026.png)
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Abstract
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Exploration of innovative approaches to achieving energy-efficient and compact device architectures is crucial for the semiconductor industry. One promising direction involves leveraging a combination of Gaussianlike transfer characteristics for superior energy scaling and ultrascaled two-dimensional (2D) field-effect transistors for reduced device footprints. Here, we demonstrate energy-efficient Gaussian transfer characteristics in a fabrication-friendly split-gate field-effect transistor using a single ultrascaled 2D channel material. We present the theoretical foundations of this architecture, showing how carefully controlled gate lengths can generate Gaussian features. Using multiscale quantum simulations, we show that tunneling transport is the fundamental operating mechanism for this phenomenon. This mechanism, supported by channels with large effective masses, allows the device to scale down to a channel length of 5 nm. We demonstrate the tunability of the amplitude, mean, and standard deviation of the Gaussian curve, which is crucial for applications in neuromorphic computing and artificial intelligence. Furthermore, we show that the separation of current levels corresponding to different offset biases enables the implementation of highly energy-efficient AND gates using a single transistor. Our study opens promising pathways for developing energy- and area-efficient devices for future logic, neuromorphic, and artificial-intelligence-based applications.
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