High-Bandwidth Spatial Equalization for mmWave Massive MU-MIMO With Processing-in-Memory

doi:10.1109/TCSII.2020.2983999

High-Bandwidth Spatial Equalization for mmWave Massive MU-MIMO With Processing-in-Memory

2020-05-01

8

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AI

DOI：10.1109/TCSII.2020.2983999

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All-digital basestation (BS) architectures enable superior spectral efficiency compared to hybrid solutions in massive multi-user MIMO systems. However, supporting large bandwidths with all-digital architectures at mmWave frequencies is challenging as traditional baseband processing would result in excessively high power consumption and large silicon area. The recently-proposed concept of finite-alphabet equalization is able to address both of these issues by using equalization matrices that contain low-resolution entries to lower the power and complexity of high-throughput matrix-vector products in hardware. In this brief, we explore two different finite-alphabet equalization hardware implementations that tightly integrate the memory and processing elements: (i) a parallel array of multiply-accumulate (MAC) units and (ii) a bit-serial processing-in-memory (PIM) architecture. Our all-digital VLSI implementation results in 28nm CMOS show that the bit-serial PIM architecture reduces the area and power consumption up to a factor of $ 2\times $ and $3\times $ , respectively, when compared to a parallel MAC array that operates at the same throughput.

Keyword:

Millimeter wave (mmWave)

massive multi-user MIMO

spatial equalization

quantization

digital ASIC design

processing-in-memory (PIM)

High-Bandwidth Spatial Equalization for mmWave Massive MU-MIMO With Processing-in-Memory

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