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HLS-Based Large Scale Self-Organizing Feature Maps
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DOI：10.1109/ACCESS.2024.3471471.png)
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摘要
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The Self-Organizing Map (SOM) algorithm is a clustering algorithm used in a wide variety of application domains. Over the last few decades, it has been accelerated using various hardware architectures, including FPGAs, CPUs, and GPUs. This publication presents an High-Level Synthesis-based implementation that utilizes multiple processing elements to realize a high-performance system architecture. An extensive design space exploration was conducted to evaluate the performance range of the architecture. For this, vector dimensions ranging from 8 up to 512 and map sizes from 16x 16 to 512x512 were used. The evaluation was performed using two different AMD/Xilinx UltraScale+ FPGA systems, the VCU128 PCIe-based accelerator card and the ZCU106 stand-alone evaluation kit. From the achieved results, it can be seen that the performance scales nearly linearly for a given vector dimension when the map size is increased. In addition, the energy efficiency for both FPGAs was analyzed, revealing that while the ZCU106 is less powerful in terms of raw compute power, it requires up to 4x less power and, depending on the configuration, can be 2x more energy efficient compared to the VCU128. One of the main reasons for this is that it does not require a dedicated host system but utilizes its internal ARM cores. Finally, a comparison against state-of-the-art SOM implementations was conducted. The proposed design achieves a speed-up of up to 458.7, 1,630.4 , and 4.9 compared to other CPU, GPU, and FPGA realizations, respectively.
Keyword:
Neurons
Computer architecture
Clustering algorithms
Training
Graphics processing units
Statistical analysis
Space exploration
Heterogeneous networks
Field programmable gate array
hardware acceleration
machine learning
reconfigurable architectures
reconfigurable computing
heterogeneous computing
heterogeneous architectures
self-organizing feature maps
optimization
design space exploration
heterogeneous architectures
self-organizing feature maps
optimization
design space exploration
期刊
IF:
3.6
论文数:
9.8W
被引数:
29.4W
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引用论文
SOMprocessor: A high throughput FPGA-based architecture for implementing Self-Organizing Maps and its application to video processing.png)
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