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Hot spots profiling and dataflow analysis in custom dataflow computing SoftProcessors
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DOI：10.1016/j.jss.2016.07.025.png)
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In the past decades, instruction set extension problem has been a key research area for state-of-the-art design automation of Very Large Scale integration (VLSI) systems. Meanwhile, recently there is a renewed interest for hot spot profiling and dataflow analysis in custom instruction set processors. This paper proposes HOTISE, an architecture framework for adaptive reconfigurable instruction set processors (RISP) with dynamic profiling and dataflow analysis. A dynamic profiler is employed to obtain hot spots for each application at run-time. Then the selected hot spots will be considered as custom instructions and implemented in reconfigurable logic arrays. An instruction generator based on dataflow generation provides a mapping scheme from each selected instruction to hardware processing element in the array. To demonstrate the accuracy and feasibility of HOTISE, we have implemented a profiler prototype using simulator-based RTL codes. Experimental results show that the profiling results can cover more than 97% hot spots of MiBench and NetBench applications. In particular, the custom instruction of CRC and MD5 application proves the effectiveness of the mapping mechanism, the code sizes of CRC and MD5 could decrease to 32.5% and 37%, while achieving the speedup at 4.7x and 5.1x, respectively. (C) 2016 Elsevier Inc. All rights reserved.
Keyword:
Adaptive processor
Dynamic profiling
Hot spot
Instruction set extension
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