Image encryption method based on improved ECC and modified AES algorithm

doi:10.1007/s11042-021-10700-x

2021-03-02

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DOI：10.1007/s11042-021-10700-x

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Currently, embedded systems can be found everywhere in quotidian life. In the development of embedded systems, information security is one of the important factors. Encryption is an efficient technique to protect information against attacks. However, because of constraints, existing encryption functions are not compatible and do not agree with real-time applications in embedded systems. In this paper, an improved cryptographic approach with a high level of security and high speed is put forward. Our work uses an efficient version of a hybrid scheme comprising an Advanced Encryption Standard (AES) - Elliptic Curve Cryptography (ECC) for medical image encryption, which combines the benefits of the symmetric AES to speed-up data encryption and asymmetric ECC in order to secure the interchange of a symmetric session key. The contribution of this paper consists of the following two main points: First, we put forward an optimized ECC hardware architecture to respect the compromise between area, power dissipation, and speed. Thus, we primarily utilize only two multipliers to develop the Point Addition (PA) block and the Point Doubling (PD) block, which reduces time complexity. Then, a 32-bit multiplier and a 32-bit inverter architecture based on shifts and XORs are proposed to reduce power consumption and area occupancy. Second, for image encryption, we primarily propose to modify the AES by eliminating the mix-columns transformation and replacing it with a permutation based on the shifts of columns, which decreases time complexity while maintaining the Shannon diffusion and the confusion principle. Then, an adjustment of the rearrangement of the general structure is given to enhance the entropy value. The global cryptosystem is implemented using a co-design approach where the modified AES runs on the NIOS II processor, and the scalar ECC multiplication is designed as a hardware accelerator. The suggested cryptographic system spends much less execution time, which is a significant factor for being applied in practice. Security analysis is successfully performed, and our experiments prove that our proposed technique provides the basics of cryptography with more simplicity and correctness. In fact, the results of the evaluation prove the effectiveness, rapidity and high security of the suggested algorithm.

Keyword:

Embedded system

MAES

ECC

Co-design

FPGA

NIOS II

Fast image encryption

High security