Improved DFT-Based Phasor Estimation Algorithm Using Down-Sampling

Babak Jafarpisheh

doi:10.1109/TPWRD.2018.2831005

2018-12-01

PRE

Babak Jafarpisheh

Seyed M. Madani *

Siamak Jafarpisheh

DOI：10.1109/TPWRD.2018.2831005

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摘要

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Fast and accurate fundamental phasor-estimation is a challenging task in digital relays. This letter proposes an improved discrete Fourier transform (DFT)-based phasor estimation algorithm. The accuracy of DFT-based methods is degraded owing to presence of decaying dc component (ddc) in fault current signals. To overcome the undesired effect of ddc, this letter introduces an auxiliary signal, which is generated by down-sampling of the fault current. The fundamental phasor is precisely estimated using sample-summation of the auxiliary signal besides DFT and sample-summation of the fault-current signal. Comprehensive simulations are performed for performance evaluation. The simulation results confirm that the proposed algorithm is fast and robust against ddc, harmonics, and noise. Moreover, the algorithm reduces the computational complexity, which makes it appropriate for digital relaying.

Keyword:

Decaying dc component

digital relay

discrete Fourier transform (DFT)

down-sampling

phasor estimation