返回
Improving Bit-Error-Rate Performance Using Modulation Coding Techniques for Spin-Torque Transfer Magnetic Random Access Memory
DOI:10.1109/ACCESS.2023.3263527.png)
摘要
En 中文
In non-volatile random-access memory (RAM) technologies, the spin-torque transfer magnetic random-access memory (STT-MRAM) is a promising candidate. STT-MRAM has attracted attention owing to its advantages, such as a high density, high endurance, and high-speed writing/reading. Moreover, STT-MRAM is utilized to replace dynamic random-access memory (DRAM) in Internet of Things (IoT) and artificial intelligence (AI) applications. However, because the magnetic tunnel junction is used to write data, STT-MRAM must face process variation and thermal fluctuation problems. This causes errors in writing and reading processes. These errors are independent of each other. Therefore, to solve them and increase the reliability of STT-MRAM, the data are encoded before storage in STT-MRAM devices. In this study, we propose a method for designing codewords using modulation coding techniques. Our codewords increase the minimum Hamming distance and inheritance of the sparse code characteristic to exploit the asymmetric probability of the write errors. The simulation results show that our codewords can improve the bit error rate performance of STT-MRAM compared with previous works.
Keyword:
Codes
Magnetic tunneling
Magnetohydrodynamics
Random access memory
Resistance
Fluctuations
Writing
Cascaded channel model
error correction codes (ECCs)
non-volatile RAM
modulation coding
sparse codes
spin-torque transfer magnetic random-access memory (STT-MRAM)
期刊
IF:
3.6
论文数:
9.8W
被引数:
29.4W
机构
引用论文
AWARE: Adaptive Way Allocation for Reconfigurable ECCs to Protect Write Errors in STT-RAM Caches意识到: 可重新配置的ecc的自适应方式分配,以保护stt-ram缓存中的写入错误
Design of Rate-Compatible Protograph LDPC Codes for Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM)
IEEE ACCESS
IF3.6

