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In-memory analog computing for non-negative matrix factorization
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DOI：10.1038/s41467-026-68609-8.png)
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Abstract
En 中文
Non-negative matrix factorization (NMF) is a powerful technique for extracting latent structures from high-dimensional data, with applications spanning recommender systems, bioinformatics, and image processing. However, conventional digital hardware struggles to efficiently handle large-scale NMF due to computational complexity and memory bottlenecks. In this work, we propose an in-memory analog NMF solver based on a reconfigurable compact generalized inverse circuit, optimized using the conductance compensation principle. This circuit significantly reduces power consumption by minimizing the number of operational amplifiers while supporting various non-negative regression constraints. By integrating the alternating non-negative least squares algorithm, we achieve efficient and accurate factorization with a limited number of iterations. Experimental validation demonstrates the effectiveness of our analog NMF solver in real-world tasks, including image compression and collaborative filtering-based recommender systems, achieving high accuracy with orders-of-magnitude improvements in speed and energy efficiency over FPGA- and GPU-based digital solvers. These results highlight the potential of analog matrix computing for enabling real-time, large-scale NMF applications. The implementation of non-negative matrix factorization–a powerful technique finding hidden patterns in high-dimensional data – remains challenging due to computational complexity. Wang et al. report an in-memory analogy solver, enabling accurate factorization with fast operation at low power consumption.
Keywords:
Non-negative matrix factorization
In-memory analog computing
Generalized inverse circuit
Alternating non-negative least squares
Power-efficient computation
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