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Inductorless dynamic logic based on 2Φ-Josephson junctions
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DOI：10.1016/j.vlsi.2025.102599.png)
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Despite offering significant performance and energy efficiency advantages over CMOS, superconductive digital circuits face several challenges including scaling limitations. Traditional single flux quantum (SFQ) circuits require synchronous clock signals, leading to complex clock distribution networks. The integration density of SFQ circuits is also hindered by the need for large storage inductors. To overcome these challenges, an inductorless dynamic logic based on ferromagnetic bistable 2 cent-Josephson junctions (JJ) is proposed. This logic family offers a scalable solution for asynchronous superconductive logic circuits. The behavior of 2 cent-Josephson junctions is reviewed, and all-JJ dynamic circuits facilitating clockless operation are introduced. Inductorless dynamic AND and OR gates are evaluated in a half adder. The characteristics, margins, and effects of the parasitic inductances on circuit operation are discussed. As compared to RSFQ gates in the same technology (1 kA/cm2), these logic gates exhibit 59% less delay (9 ps). 2 cent-JJs require less energy to switch between equilibrium states. As a result, a decrease of 65% in bias current as compared to standard dynamic SFQ circuits is achieved. The reduction in bias current in half flux quantum operation requires 6.7X less energy per transition. Utilizing standard Josephson junctions rather than inductors saves 42 mu m2 and 53 mu m2 of loop inductance area within, respectively, a dynamic AND gate and dynamic OR gate for the 10 kA/cm2 MIT LL SFQ5ee technology.
Keyword:
Single flux quantum
Superconductor electronics
Half flux quantum
Inductorless all-JJ circuits
Dynamic logic
期刊
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IF:
2.5
论文数:
120
被引数:
0
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